High $1/f$ noise in Cryogenic CMOS (CryoCMOS) devices is a critical parameter to keep under control in the design of complex circuits for low-temperature applications. Current models predict the $1/f$ noise to scale linearly with temperature, and gate oxide defects are expected to freeze out at cryogenic temperatures. Nevertheless, it has been repeatedly observed that $1/f$ noise deviates from the predicted behavior and that gate oxide defects are still active around 4.2 K, producing random telegraph noise. In this paper, we probe single-gate oxide defects in 2500 nMOS devices down to 5 K in order to investigate the origin of $1/f$ noise in CryoCMOS devices. From our results, it is clear that the number of defects active at cryogenic temperatures resulting in random telegraph noise is larger than at 300 K. Threshold voltage shifts due to charged defects are shown to be exponentially distributed, with different modalities across temperatures and biases: from monomodal at 300 K to trimodal below 100 K. Distributions’ shapes are interpreted in the framework of percolation theory. By fitting these distributions, it is shown that more than 80% of the detected defects belong to the bulk oxide. Afterward, starting from the raw data in the time domain, we reconstruct the low-frequency noise spectra, highlighting the contributions of defects belonging to different branches and, therefore, to different oxide layers. This analysis shows that, although interface traps and large defects associated with the third mode are the main sources of $1/f$ noise at 5 K, bulk oxide defects still contribute significantly to low-frequency noise at cryogenic temperatures. Finally, we show that defect time constants and step heights are uncorrelated, proving that the elastic tunneling model for charge trapping is not accurate.

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• Charge
• Charge dynamics
• Dielectric properties
• Electron emission
• Field-effect transistors
• Liquid helium cooling
• Machine learning
• Noise measurements