Dimensionality reduction for closed-loop quantum gate calibration
Phys. Rev. Applied 26, 044057 – Published 20 October, 2026
DOI: https://doi.org/10.1103/w2v4-7pvc
Abstract
Numerical gate design typically makes use of high-dimensional parametrizations enabling sophisticated, highly expressive control pulses. Developing efficient experimental calibration methods for such gates is a long-standing challenge in quantum control, as on-device calibration requires the optimization of noisy experimental data over high-dimensional parameter spaces. To improve the efficiency of calibrations, we present a systematic method based on singular value decomposition stacking for reducing the dimensionality of the parameter space traversed in gate calibration, starting from an arbitrary high-dimensional pulse representation. We use this approach to design and calibrate an gate robust against amplitude and detuning errors, as well as an gate robust against coherent errors due to a spectator qubit.