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Demonstration of sequential processors with quantum advantage and analysis of classical performance limits

Shota Tateishi1, Wenhao Wang2, Baptiste Chevalier2, Takafumi Ono1,*, Masahiro Takeoka2,3,†, and Wojciech Roga2,‡

  • *Contact author: ono.takafumi@kagawa-u.ac.jp
  • †Contact author: takeoka@elec.keio.ac.jp
  • ‡Contact author: wojciech.roga@keio.jp
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Phys. Rev. Research 8, 013157 – Published 11 February, 2026

DOI: https://doi.org/10.1103/xj4v-k86w

Abstract

In this paper, we theoretically and experimentally analyze sequential processors with limited communication between parts. We compare the expressivity of sequential quantum and classical processors under the same constraints. They consist of three or four modules, each of which processes local data. The modules of the quantum processor are linked through one-qubit or one-qutrit communication, while those of the classical processor communicate through one bit or one trit. For the classical processor, we prove bounds on its performance in terms of inequalities on correlations of the output with a target function. We theoretically show that the quantum processor violates these inequalities. We show this violation experimentally on a silicon photonics setup. We describe how to find the classical bound on correlations with arbitrary target function by reducing the problem to the minimization of an Ising-type spin-glass Hamiltonian. Our theory is applicable to general problems, such as the low-rank binary matrix approximation.

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Phys. Rev. Research 8, 013157– Published 11 February, 2026
  • Received 24 September 2025
  • Accepted 12 January 2026
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