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    Spontaneous damage annealing reactions as a possible source of low energy excess in semiconductor detectors

    Kai Nordlund*, Fanhao Kong†, Flyura Djurabekova‡, Matti Heikinheimo§, Kimmo Tuominen∥, and Antti Kuronen

    Nader Mirabolfathi**

    • Department of Physics and Astronomy and Mitchell Institute for Fundamental Physics and Astronomy, Texas A&M University, College Station, Texas 77843, USA

    • *Contact author: kai.nordlund@helsinki.fi
    • †Contact author: fanhao.kong@helsinki.fi
    • ‡Contact author: flyura.djurabekova@helsinki.fi
    • §Contact author: matti.heikinheimo@helsinki.fi
    • ∥Contact author: kimmo.i.tuominen@helsinki.fi
    • Contact author: antti.kuronen@helsinki.fi
    • **Contact author: mirabolfathi@physics.tamu.edu

    Phys. Rev. Materials 9, 113603 – Published 24 November, 2025

    DOI: https://doi.org/10.1103/p7s5-4qjw

    Abstract

    In semiconductor detectors designed for capturing dark matter particles or neutrinos, when the detection threshold is constantly improved to increasingly low energies, an “excess” signal of apparent energy release events below a few hundred eV is observed in several different kinds of detectors. This becomes a big obstacle to the observation of actual dark matter signals, hindering the detectors' sensitivity for rare events in this energy range. Using atomistic simulations with a classical thermostat and a quantum thermal bath, we show that this kind of signal is consistent with energy release from long-term annealing events of complex defects that can be formed by any kind of nuclear recoil radiation events. Such energy releases are shown to have a very similar exponential dependence on energy release magnitudes as that observed in experiments. By detailed analysis of the annealing events, we show that crossing very low energy barriers can trigger larger energy releases in an avalanche-like effect. This explains why large energy release events can occur even down to cryogenic temperatures, where the significant migration of point defects in silicon is hardly ever possible.

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