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    Effects of alloy disorder on strongly driven flopping mode qubits in Si/SiGe

    Merritt P. R. Losert1,*, Utkan Güngördü2,3, S. N. Coppersmith4, Mark Friesen1, and Charles Tahan2,†

    • *Contact author: mlosert@umd.edu
    • †Present address: Department of Physics, University of Maryland, College Park, Maryland 20742, USA.

    Phys. Rev. B 113, 235301 – Published 2 June, 2026

    DOI: https://doi.org/10.1103/dv6w-fn24

    Abstract

    In Si quantum dot systems, large magnetic field gradients are needed to implement spin rotations via electric dipole spin resonance (EDSR). By increasing the effective electron dipole, flopping mode qubits can provide faster gates with smaller field gradients. Moreover, operating in the strong-driving limit can reduce their sensitivity to charge noise. However, alloy disorder in Si/SiGe heterostructures randomizes the valley energy splitting and the valley phase difference between dots, enhancing the probability of valley excitations while tunneling between the dots, and opening a leakage channel. In this work, we analyze the performance of flopping mode spin qubits in the presence of charge noise and alloy disorder, and we optimize these qubits for a variety of valley configurations in both weak- and strong-charge-noise regimes. When the charge noise is weak, high-fidelity qubits can be implemented across a wide range of valley parameters, provided the electronic pulse is fine-tuned for a given valley configuration. When the charge noise is strong, high-fidelity pulses can still be engineered, provided the valley splittings in each dot are relatively large and the valley phase difference is relatively small. We analyze how charge-noise-induced fluctuations in the interdot detuning, as well as small shifts in other qubit parameters, impact qubit fidelities. We find that strongly driven pulses are less sensitive to detuning fluctuations but more sensitive to small shifts in the valley parameters, which can actually dominate the qubit infidelities in some regimes. Finally, we discuss schemes to tune devices away from poor-performing configurations, enhancing the scalability of flopping mode-based qubit architectures.

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