Anisotropy-driven thermoelectric optimization in phosphorene devices via layer-thickness engineering
Phys. Rev. B 112, 085409 – Published 7 August, 2025
DOI: https://doi.org/10.1103/9rmw-j4m5
Abstract
The layer-dependent electronic and thermal transport properties of phosphorene offer a unique platform for designing high-performance thermoelectric devices. Here, we employ a combination of density functional theory and nonequilibrium Green's function formalism to investigate the thermoelectric performance of phosphorene-based transistors with spatially modulated layer thicknesses. By engineering the thickness of the active region from four layers to a single monolayer, we demonstrate a significant enhancement in the thermoelectric figure of merit , achieving at 300 for transport along the armchair direction: a threefold increase over uniform four-layer devices. This improvement arises from the interplay between suppressed phonon thermal conductivity (reduced by via interfacial scattering) and maintained high electrical conductivity due to tailored band alignment and anisotropic charge transport. The armchair-oriented devices outperform zigzag configurations owing to their lower lattice thermal conductivity, despite the latter's superior power factor. Phonon transport calculations, utilizing Stillinger-Weber potentials and Green's function methods, reveal that thickness gradients induce strong backscattering, effectively decoupling electronic and thermal transport. Furthermore, the transition to monolayer regions creates a type-I heterojunction, enhancing thermopower while minimizing parasitic heat dissipation. Our results not only establish phosphorene as a versatile candidate for on-chip energy harvesting, but also provide a general framework for leveraging dimensionality and anisotropy in van der Waals heterostructures to optimize thermoelectric efficiency.