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    Energy-efficient silicon cold-source diodes with subunity ideality factor and high rectification ratio

    Zhijiang Wang1,2, Ligong Zhang1,2, Yuchen Wang1,2, Yijiao Wang3, Xiaoyan Liu1,2, and Fei Liu1,2,*

    • 1School of Integrated Circuits, Peking University, Beijing 100871, China
    • 2Beijing Advanced Innovation Center for Integrated Circuits, Beijing 100871, China
    • 3School of Integrated Circuit Science and Engineering, Beihang University, Beijing 100191, China

    • *Contact author: feiliu@pku.edu.cn

    Phys. Rev. Applied 23, 064006 – Published 4 June, 2025

    DOI: https://doi.org/10.1103/q2w8-k4w9

    Abstract

    Silicon-based diodes are fundamental components in modern semiconductor technology. However, their performance is hindered by the Boltzmann switching limit, resulting in an ideality factor larger than 1 and a high operating voltage. In this work, we propose a silicon cold-source diode (CSD) to realize energy-efficient switching with subunity ideality factor. The silicon cold-source diode integrates a p-n junction with a cold source comprised of a metal layer sandwiched between N-type and P-type silicon. Through first-principles transport calculations, it is demonstrated that the silicon cold-source diode can enable low-energy carrier injection and enhanced current by adjusting the doping concentration and varying the metal material. The CSDs can realize a subunity ideality factor, as low as 0.79. The operating voltage can be further reduced to 0.4 V. At the same time, the rectification characteristics can also be improved with the on-off current ratio exceeding 109. By optimizing the metal layer, on-state current comparable to p-n diode can be achieved in CSDs. We have designed potential preparation processes for CSDs and analyzed the associated challenges. The doping concentration in the N-type and P-type regions is critical to device performance. Insufficient doping concentration leads to significant performance degradation. These findings serve as a valuable framework for the design and optimization of cold-source diodes compatible with CMOS technology, particularly tailored for low-power applications.

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