Thermal boundary conductance (TBC) between silicon and diamond influences heat removal in next-generation electronics where $\mathrm{Si}$ and diamond serve as substrates or channels. In this paper, we report simulations of $\mathrm{Si}$/diamond interfaces using machine-learning interatomic potential (MLIP)-driven molecular dynamics. MLIPs trained on ab initio $\mathrm{Si}$/diamond heterostructures faithfully reproduce interfacial $\mathrm{Si}$—$\mathrm{C}$ bonding and the phonon dispersions of bulk $\mathrm{Si}$ and diamond, whereas the classical Tersoff potential fails to capture these accurately. After quantum correction, the room-temperature TBC of a bare $\mathrm{Si}$/diamond interface is $130\mathrm{MW}{\mathrm{m}}^{-2}{\mathrm{K}}^{-1}$, in close agreement with experiment (approximately $140\mathrm{MW}{\mathrm{m}}^{-2}{\mathrm{K}}^{-1}$), and far below predictions from Tersoff molecular dynamics ($310\mathrm{MW}{\mathrm{m}}^{-2}{\mathrm{K}}^{-1}$) or a first-principles phonon-dispersion diffuse mismatch model ($205\mathrm{MW}{\mathrm{m}}^{-2}{\mathrm{K}}^{-1}$). Adding a 1-nm-thick ${\mathrm{Si}\mathrm{N}}_x$ interlayer approximately doubles the TBC to $275\mathrm{MW}{\mathrm{m}}^{-2}{\mathrm{K}}^{-1}$, and replacing ${\mathrm{Si}\mathrm{N}}_x$ with amorphous carbon further increases it to $350\mathrm{MW}{\mathrm{m}}^{-2}{\mathrm{K}}^{-1}$. The density of states analysis reveals that the interlayer supplies a large portion of intermediate phonon modes that bridge $\mathrm{Si}$ and diamond. Finite-element device simulations indicate that these TBC improvements measurably reduce peak chip temperature. These results highlight interfacial-layer engineering as a potential route to improved thermal management in wide-band-gap electronics.

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• Heat transfer
• Thermal boundary conductance
• Thermal conductivity
• Devices
• Heterostructures
• Multilayer thin films
• Semiconductors
• Solid-solid interfaces