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    Mitigation of magnetic flux trapping in superconducting electronics using moats

    Rohan T. Kapur*,†, Sergey K. Tolpygo‡, Alex Wynn, Pauli Kehayias, Adam A. Libson, Collin N. Muniz, Michael J. Gold, Justin L. Mallek, Danielle A. Braje et al.

    Jennifer M. Schloss

    • *Present Address: Department of Physics, Harvard University, Cambridge, Massachusetts 02138, USA.
    • †Contact author: rohankapur@fas.harvard.edu
    • ‡Contact author: sergey.tolpygo@ll.mit.edu

    Phys. Rev. Applied 26, 034038 – Published 17 September, 2026

    DOI: https://doi.org/10.1103/7n7l-k65c

    Abstract

    Magnetic flux (vortex) trapping remains a major obstacle to very large scale integration in superconducting electronics. Moats—etched regions in circuit layers placed in ground planes and around critical circuitry—offer a simple passive approach to sequester flux. Here, we systematically examine the effectiveness of moat arrays in superconducting niobium films as a function of geometry (size, shape, and density) and background magnetic field. By measuring the vortex expulsion field, we estimate the flux saturation number and flux trapping temperature for a range of geometries. We find that many moat designs effectively sequester flux in magnetically shielded environments (<1  μT), with high-aspect-ratio rectangular “slit” moats providing the strongest mitigation at minimal area cost. However, our measurements show that moats alone do not eliminate flux trapping in nonideal films, as vortices can preferentially pin at material defects. These results provide design guidance for flux mitigation in superconducting integrated circuits and highlight the need for combined optimization of circuit geometries and materials.

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