Ab initio device-driven screening of sub-1-nm-thickness oxide semiconductors for future CMOS technology nodes
Phys. Rev. Applied 25, 064006 – Published 2 June, 2026
DOI: https://doi.org/10.1103/73mc-yfp4
Abstract
Ultrathin oxide semiconductors with sub-1-nm thickness are promising building blocks for ultrascaled field-effect transistor (FET) applications due to their resilience against short-channel effects, high air stability, and potential for low-energy device operation. However, the n-type dominance of ultrathin oxide FET has hindered their integration into complementary metal-oxide-semiconductor (CMOS) technology, which requires both n- and p-type devices. Here, we develop an ab initio device-driven computational screening workflow to identify sub-1-nm-thickness oxide semiconductors for sub-5-nm FET applications. We demonstrate that ultrathin , , and are compatible with p-type device operations under both high-performance (HP) and low-power (LP) requirements specified by the International Technology Roadmap of Semiconductors (ITRS), thereby expanding the limited family of p-type oxide semiconductors. Notably, and emerge as the first-of-the-kind sub-1-nm-thickness oxide semiconductors capable of simultaneously meeting the HP and LP criteria of the ITRS for both n- and p-type devices. and FETs outperform many existing low-dimensional semiconductors, exhibiting scalability below a 5-nm gate length. Our findings offer a pioneering effort in the ab initio, device-driven screening of sub-1-nm-thickness oxide semiconductors, significantly broadening the material candidate pool for future CMOS technology nodes.