The Boolean satisfiability (SAT) problem is a central benchmark for quantum optimization, but conventional encodings typically require one qubit per active variable, limiting their use on near-term quantum hardware. Here we introduce a space-efficient framework for one-in-three SAT based on the decisive chain reduction algorithm (DCRA), which exploits clause-induced dependencies. For an instance generated with (n) variables and (m) clauses, let (n) be the number of active variables appearing in the clauses. DCRA identifies (s) initial variables and expresses the remaining (n-s) active variables as linear combinations of them, reducing the effective search space from (2^{n}) to (2^s). For positive random instances near the critical regime, we empirically find (s) close to (n-m), yielding substantial qubit savings. In the reduced space, we derive a compact quadratic unconstrained binary optimization (QUBO) formulation whose problem Hamiltonian provides a common input for quantum annealing (QA), the quantum adiabatic algorithm (QAA), and the quantum approximate optimization algorithm (QAOA). Numerical simulations validate the framework on instances with up to 150 variables for QA-based solvers and up to 50 variables for QAA- and QAOA-based implementations. For QA-based solvers, finite-size scaling on satisfiable positive random instances with up to 200 variables shows an approximately exponential decay of the mean success probability and reveals a clause-density-dependent tradeoff between qubit reduction and annealing hardness. On a superconducting processor, six-qubit QAOA solves a 25-variable instance with (n=21) active variables, achieving (12.62%) success above the (4.69%) uniform-sampling baseline. For a 13-variable instance, DCRA achieves a measured success probability of (3.37%), compared to (0.05%) with the direct encoding at equal shot budgets. These results demonstrate that structure-exploiting reductions offer a practical route to qubit-efficient quantum formulations of satisfiability problems on near-term hardware.