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    Comparison of spin-qubit architectures for quantum error-correcting codes

    Mauricio Gutiérrez1,*, Juan S. Rojas-Arias2, David Obando3, and Chien-Yuan Chang4,5,†

    • *Contact author: mauricio.gutierrez_a@ucr.ac.cr
    • †Contact author: cychang@ee.nthu.edu.tw

    Phys. Rev. A 113, 062464 – Published 26 June, 2026

    DOI: https://doi.org/10.1103/qlw3-xk2f

    Abstract

    We investigate the performance of two quantum error-correcting codes—the surface code and the Bacon-Shor code—for implementation with spin qubits in silicon. In each case, we construct a logical qubit using a planar array of quantum dots, exploring two encoding schemes: one based solely on single-electron Zeeman qubits (Loss-DiVincenzo qubits) and a hybrid approach combining Zeeman and singlet-triplet qubits. For both codes, we evaluate key performance metrics, including logical state preparation fidelity and cycle-level error correction performance, using state-of-the-art experimental parameters. Our results show that the hybrid encoding consistently outperforms the pure Zeeman qubit implementation. By identifying the dominant error mechanisms that limit quantum error correction performance, our study highlights concrete targets for improving spin-qubit hardware and provides a path toward scalable fault-tolerant architectures. In particular, we find that the logical error rate is not limited by memory errors but rather by gate errors, especially one- and two-qubit gate errors.

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